I am a fourth-year Ph.D. student in the School of Computer Science, Peking University, advised by Prof. Guojie Luo at PKU-DASYS Group (Design Automation for Next-generation Computing Systems). My current research area is Computer Architecture and I mainly focus on reconfigurable computing (e.g. FPGA, CGRA, and etc.). I hope to combine the advanced compilation and synthesis techniques with the reconfigurable architectures to build the next generation of efficient domain-specific computing systems. And I also have broad research interests including LLM, MLSys, and neuromorphic computing. I have published 17 papers with total google scholar citations . [Resume].

I obtained my B.S. in Computer Science from the School of EECS at Peking University in 2021. During the undergraduate studies, I mainly worked on the design of FPGA accelerators using High-level Synthesis (HLS). And I also worked as a research intern at Computing Technology Lab, DAMO Academy, Alibaba Group, where I had the priviledge of working with Dr. Yen-kuang Chen and Dr. Yuan Xie.

🔥 News

2024.08: 🎉🎉 Our paper Adaptive Spatiotemporal Neural Networks through Complementary Hybridization has been accepted by Nature Communications and selected as Editors’ Highlights. Codes and Datasets are available here.
2024.05: 🎉🎉 Our paper ImageMap: Enabling Efficient Mapping from Image Processing DSL to CGRA has been accepted by 30th International European Conference on Parallel and Distributed Computing (EuroPAR-24).
2024.02: 🎉🎉 Our paper PT-Map: Efficient Program Transformation Optimization for CGRA has been accepted by 61st Design Automation Conference (DAC-24).

📝 Publications

Journals

[J4] Adaptive Spatiotemporal Neural Networks through Complementary Hybridization, Yujie Wu#, Bizhao Shi# (# denotes Equal Contributions), Zhong Zheng, Hanle Zheng, Fangwen Yu, Xue Liu, Guojie Luo, and Lei Deng. in the Nature Communications (NatComm), Vol: 15: Issue: 1, August 2024, pp. 7355.

[J3] Weave: Abstraction and Integration Flow for Accelerators of Generated Modules, Tuo Dai, Bizhao Shi, and Guojie Luo. in the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol: 43: Issue: 3, March 2024, pp. 854-867.

[J2] PowerSyn: A Logic Synthesis Framework with Early Power Optimization, Sunan Zou, Jiaxi Zhang, Bizhao Shi, and Guojie Luo. in the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol: 43: Issue: 1, Jan 2024, pp. 203-216.

[J1] Efficient Super-Resolution System With Block-Wise Hybridization and Quantized Winograd on FPGA, Bizhao Shi, Jiaxi Zhang, Zhuolun He, Xuechao Wei, Sicheng Li, Guojie Luo, Hongzhong Zheng, and Yuan Xie. in the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol: 42: Issue: 11, November 2023, pp. 3910-3924.

Conferences

[C13] MuSA: Multi-Sketch Accelerator with Hybrid Parallelism and Coalesced Memory Organization, Sunan Zou, Bizhao Shi, Ziyun Zhang, and Guojie Luo. to appear in the Proceedings of the 42nd International Conference on Computer Design (ICCD), Nov, 2024.

[C12] ImageMap: Enabling Efficient Mapping from Image Processing DSL to CGRA, Bizhao Shi, Tuo Dai, Sunan Zou, Ximing Wei, and Guojie Luo. in the Proceedings of the 30th International European Conference on Parallel and Distributed Computing (Euro-Par), Aug, 2024.

[C11] G^2PM: Performance Modeling for ACAP Architecture with Dual-Tiered Graph Representation Learning, Tuo Dai, Bizhao Shi, and Guojie Luo. in the Proceedings of 2024 Design Automation Conference (DAC), Jun, 2024.

[C10] PT-Map: Efficient Program Transformation Optimization for CGRA Mapping, Bizhao Shi, Tuo Dai, Jiaxi Zhang, Xuechao Wei, and Guojie Luo. in the Proceedings of 2024 Design Automation Conference (DAC), Jun, 2024.

[C9] BESWAC: Boosting Exact Synthesis via Wiser SAT Solver Call, Sunan Zou, Jiaxi Zhang, Bizhao Shi, and Guojie Luo. in the Proceedings of 2024 Design Automation and Test in Europe (DATE), Mar, 2024.

[C8] WideSA: A High Array Utilization Mapping Scheme for Uniform Recurrences on the Versal ACAP Architecture, Tuo Dai, Bizhao Shi, and Guojie Luo. in the Proceedings of 2024 Design Automation and Test in Europe (DATE), Mar, 2024.

[C7] F-TFM: Accelerating Total Focusing Method for Ultrasonic Array Imaging on FPGA, Bizhao Shi, Jieran Zhang, and Guojie Luo. in the Proceedings of 2023 International Conference on Field-Programmable Technology (FPT), Dec, 2023.

[C6] RF-SIFTER: Sifting Signals at Layer-0.5 to Mitigate Wideband Cross-Technology Interference for IoT, Xiong Wang, Jun Huang, Bizhao Shi, Zhe Ou, Guojie Luo, Linghe Kong, Daqing Zhang, and Chenren Xu. in the Proceedings of the 29th Annual International Conference on Mobile Computing and Networking (MobiCom), Jul, 2023.

[C5] Weave: Abstraction for Accelerator Integration of Generated Modules, Tuo Dai, Bizhao Shi, and Guojie Luo. in International Symposium on Field Programmable Gate Arrays (FPGA), Feb, 2023. (Poster)

[C4] 2022 ICCAD CAD Contest Problem C: Microarchitecture Design Space Exploration, Sicheng Li, Chen Bai, Xuechao Wei, Bizhao Shi, Yen-Kuang Chen, and Yuan Xie. in the Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Oct, 2022.

[C3] EasyMAC: Design Exploration-Enabled Multiplier-Accumulator Generator Using a Canonical Architectural Representation, Jiaxi Zhang, Qiuyang Gao, Yijiang Guo, Bizhao Shi, Guojie Luo. in the Proceedings of the 27th Asia and South Pacific Design Automation Conference (ASP-DAC), Jan, 2022. (Invited)

[C2] BlockGNN: Towards Efficient GNN Acceleration Using Block-Circulant Weight Matrices, Zhe Zhou, Bizhao Shi, Zhe Zhang, Yijin Guan, Guangyu Sun, and Guojie Luo. in the Proceedings of the 58th ACM/IEEE Design Automation Conference (DAC), Dec, 2021.

[C1] Winograd-Based Real-Time Super-Resolution System on FPGA, Bizhao Shi, Zhucheng Tang, Guojie Luo, and Ming Jiang. in the Proceedings of 2019 International Conference on Field-Programmable Technology (FPT), Dec, 2019.

🏆 Honors and Awards

Academic awards

Nature Communications Editors’ Highlights in the applied physics and mathematics track here.
2nd place of 2021 IEEE CEDA EDAthon.
3nd place of 2019 IBM OpenCAPI Heterogenous Computing Contest.

Honors and scholarships

2024.12 - Qingyun Shi Outstanding Paper Award (石青云院士优秀论文奖), Peking University
2024.12 - Xiaomi Top Ten Academic Awards (小米杯“学术十杰”称号), Peking University
2024.10 - Young Elite Scientist Sponsorship (YESS) Doctoral Special Program (中国科协青年人才托举工程博士生专项), China Association for Science and Technology (CAST)
2024.09 - National Scholarship (国家奖学金), Peking University
2024.09 - Honors for Academic Innovation (学术创新奖), Peking University
2024.09 - President Scholarship (校长奖学金), Peking University
2024.09 - Honors for Outstanding Academic Performance (优秀科研奖), Peking University
2023.09 - Honors for Merit Student (三好学生), Peking University
2023.09 - Huatai Securities Technology Scholarship (华泰证券奖学金), Peking University
2021.07 - Honors for Outstanding Undergraduate Graduates in Beijing (北京市优秀毕业生)
2021.07 - Honors for Outstanding Undergraduate Graduates in Peking University (北京大学优秀毕业生)
2020.10 - The Second Class Scholarship (北京大学二等奖学金), Peking University
2020.10 - Honors for Merit Student (三好学生), Peking University
2018.10 - The May 4th Scholarship (五四奖学金), Peking University

📖 Educations

2021.09 - Present, PhD Student, School of Computer Science, Peking University.
2017.09 - 2021.07, Undergraduate Student, School of Electronics Engineering and Computer Science, Peking University.

💬 Invited Talks

2024.01, Invited talk about the FPGA acceleration of ultrasonic array imaging at AMD Winter Camp.

💻 Internships

2020.07 - 2024.02, Computing Technology Lab, Alibaba DAMO Academy, Beijing, China.

📚 Services

Official Reviewers: IEEE JETCAS
Artifact Reviewers: FPGA 2023
Teaching Assistant: Introduction to Parallel and Distributed Computing, 2020 Spring & 2022 Spring